JPS628019B2 - - Google Patents

Info

Publication number
JPS628019B2
JPS628019B2 JP56129049A JP12904981A JPS628019B2 JP S628019 B2 JPS628019 B2 JP S628019B2 JP 56129049 A JP56129049 A JP 56129049A JP 12904981 A JP12904981 A JP 12904981A JP S628019 B2 JPS628019 B2 JP S628019B2
Authority
JP
Japan
Prior art keywords
semiconductor chip
insulating film
leads
dummy
internal terminal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP56129049A
Other languages
English (en)
Japanese (ja)
Other versions
JPS5831566A (ja
Inventor
Takashi Myamoto
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Electric Co Ltd filed Critical Nippon Electric Co Ltd
Priority to JP56129049A priority Critical patent/JPS5831566A/ja
Publication of JPS5831566A publication Critical patent/JPS5831566A/ja
Publication of JPS628019B2 publication Critical patent/JPS628019B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495—Lead-frames or other flat leads
    • H01L23/49541—Geometry of the lead-frame
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/50—Tape automated bonding [TAB] connectors, i.e. film carriers; Manufacturing methods related thereto
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01082—Lead [Pb]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/1515—Shape
    • H01L2924/15153—Shape the die mounting substrate comprising a recess for hosting the device
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/15165—Monolayer substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/153—Connection portion
    • H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15312—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a pin array, e.g. PGA

Landscapes

  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Wire Bonding (AREA)
JP56129049A 1981-08-18 1981-08-18 半導体装置 Granted JPS5831566A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56129049A JPS5831566A (ja) 1981-08-18 1981-08-18 半導体装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56129049A JPS5831566A (ja) 1981-08-18 1981-08-18 半導体装置

Publications (2)

Publication Number Publication Date
JPS5831566A JPS5831566A (ja) 1983-02-24
JPS628019B2 true JPS628019B2 (en]) 1987-02-20

Family

ID=14999816

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56129049A Granted JPS5831566A (ja) 1981-08-18 1981-08-18 半導体装置

Country Status (1)

Country Link
JP (1) JPS5831566A (en])

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0534134Y2 (en]) * 1986-10-31 1993-08-30
JP2543894B2 (ja) * 1987-07-09 1996-10-16 株式会社東芝 半導体集積回路装置
JPH0367434U (en]) * 1989-10-31 1991-07-01
JPH088282B2 (ja) * 1990-11-28 1996-01-29 インターナシヨナル・ビジネス・マシーンズ・コーポレーシヨン Ｔａｂテープ、半導体チップの結合方法

Also Published As

Publication number Publication date
JPS5831566A (ja) 1983-02-24

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